add classifications and occurrence counting
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@@ -21,7 +21,6 @@ use std::convert::TryFrom;
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use std::fmt;
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use std::mem;
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use std::ops::{Deref, DerefMut};
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use std::rc::Rc;
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/*
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* The loader compiles Prolog terms read from a TermStream instance,
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@@ -1429,8 +1428,7 @@ impl MachineState {
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}
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}
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(HeapCellValueTag::Var | HeapCellValueTag::AttrVar | HeapCellValueTag::StackVar, h) => {
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let offset_string = format!("_{}", h);
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term_stack.push(Term::Var(Cell::default(), Rc::new(offset_string)));
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term_stack.push(Term::Var(Cell::default(), Var::Generated(h)));
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}
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(HeapCellValueTag::Cons | HeapCellValueTag::CStr | HeapCellValueTag::Fixnum |
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HeapCellValueTag::Char | HeapCellValueTag::F64) => {
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@@ -16,7 +16,6 @@ use modular_bitfield::specifiers::*;
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use std::cmp::Ordering;
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use std::collections::BTreeSet;
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use std::ops::{Deref, DerefMut};
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use std::rc::Rc;
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use crate::types::*;
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#[derive(Debug, Clone, PartialEq, Eq, PartialOrd, Ord, Hash)]
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@@ -228,8 +227,8 @@ impl CodeIndex {
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}
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}
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pub(crate) type HeapVarDict = IndexMap<Rc<String>, HeapCellValue, FxBuildHasher>;
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pub(crate) type AllocVarDict = IndexMap<Rc<String>, VarData, FxBuildHasher>;
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pub(crate) type HeapVarDict = IndexMap<Var, HeapCellValue, FxBuildHasher>;
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pub(crate) type AllocVarDict = IndexMap<Var, VarData, FxBuildHasher>;
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pub(crate) type GlobalVarDir = IndexMap<Atom, (Ball, Option<HeapCellValue>), FxBuildHasher>;
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@@ -21,7 +21,6 @@ use indexmap::IndexMap;
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use std::convert::TryFrom;
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use std::fmt;
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use std::ops::{Index, IndexMut};
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use std::rc::Rc;
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pub(crate) type Registers = [HeapCellValue; MAX_ARITY + 1];
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@@ -501,13 +500,13 @@ impl MachineState {
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pub fn read_term(&mut self, stream: Stream, indices: &mut IndexStore) -> CallResult {
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fn push_var_eq_functors<'a>(
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heap: &mut Heap,
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iter: impl Iterator<Item = (&'a Rc<String>, &'a HeapCellValue)>,
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iter: impl Iterator<Item = (&'a Var, &'a HeapCellValue)>,
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atom_tbl: &mut AtomTable,
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) -> Vec<HeapCellValue> {
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let mut list_of_var_eqs = vec![];
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for (var, binding) in iter {
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let var_atom = atom_tbl.build_with(&var);
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let var_atom = atom_tbl.build_with(&var.to_string());
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let h = heap.len();
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heap.push(atom_as_cell!(atom!("="), 2));
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@@ -673,7 +672,7 @@ impl MachineState {
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let printer = match self.try_from_list(self.registers[6], stub_gen) {
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Ok(addrs) => {
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let mut var_names: IndexMap<HeapCellValue, Rc<String>> = IndexMap::new();
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let mut var_names: IndexMap<HeapCellValue, Var> = IndexMap::new();
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for addr in addrs {
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read_heap_cell!(addr,
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@@ -691,18 +690,18 @@ impl MachineState {
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read_heap_cell!(atom,
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(HeapCellValueTag::Char, c) => {
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var_names.insert(var, Rc::new(c.to_string()));
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var_names.insert(var, Var::from(c.to_string()));
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}
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(HeapCellValueTag::Atom, (name, _arity)) => {
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debug_assert_eq!(_arity, 0);
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var_names.insert(var, Rc::new(name.as_str().to_owned()));
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var_names.insert(var, Var::from(name.as_str()));
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}
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(HeapCellValueTag::Str, s) => {
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let (name, arity) = cell_as_atom_cell!(self.heap[s])
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.get_name_and_arity();
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debug_assert_eq!(arity, 0);
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var_names.insert(var, Rc::new(name.as_str().to_owned()));
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var_names.insert(var, Var::from(name.as_str()));
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}
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_ => {
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unreachable!();
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@@ -12,7 +12,6 @@ use indexmap::IndexSet;
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use std::cell::Cell;
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use std::collections::VecDeque;
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use std::convert::TryFrom;
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use std::rc::Rc;
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/*
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* The preprocessor fabricates if-then-else ( .. -> ... ; ...)
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@@ -373,7 +372,7 @@ fn mark_cut_variable(term: &mut Term) -> bool {
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};
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if cut_var_found {
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*term = Term::Var(Cell::default(), Rc::new(String::from("!")));
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*term = Term::Var(Cell::default(), Var::from("!"));
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true
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} else {
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false
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@@ -656,7 +655,7 @@ fn compute_head(term: &Term) -> Vec<Term> {
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}
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}
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vars.insert(Rc::new(String::from("!")));
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vars.insert(Var::from("!"));
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vars.into_iter()
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.map(|v| Term::Var(Cell::default(), v))
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.collect()
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@@ -767,7 +766,7 @@ impl Preprocessor {
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}
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}
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Term::Literal(_, Literal::Char('!')) => Ok(QueryTerm::BlockedCut),
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Term::Var(_, ref v) if v.as_str() == "!" => {
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Term::Var(_, ref v) if v.as_str() == Some("!") => {
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Ok(QueryTerm::UnblockedCut(Cell::default()))
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}
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Term::Clause(r, name, mut terms) => match (name, source_arity(&terms)) {
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@@ -51,7 +51,6 @@ use std::net::{TcpListener, TcpStream, SocketAddr, ToSocketAddrs};
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use std::num::NonZeroU32;
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use std::ops::Sub;
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use std::process;
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use std::rc::Rc;
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use std::str::FromStr;
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use std::sync::Arc;
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@@ -1410,7 +1409,7 @@ impl Machine {
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let vars: Vec<_> = vars
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.union(&result.supp_vars) // difference + union does not cancel.
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.map(|v| Term::Var(Cell::default(), Rc::new(format!("_{}", v.get_value()))))
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.map(|v| Term::Var(Cell::default(), Var::Generated(v.get_value())))
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.collect();
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let helper_clause_loc = self.code.len();
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