rishi/scryer-prolog
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

unmark cell bits in occurs check

Browse Source
This commit is contained in:
Mark Thom
2021-11-18 09:35:00 -07:00
parent b24e7cce38
commit a0a86d0f62
1 changed files with 2 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

2
src/machine/machine_state_impl.rs
View File

@@ -882,6 +882,8 @@ impl MachineState {
if !value.is_constant() { if !value.is_constant() {
for addr in stackful_preorder_iter(&mut self.heap, value) { for addr in stackful_preorder_iter(&mut self.heap, value) {
let addr = unmark_cell_bits!(addr);
if let Some(inner_r) = addr.as_var() { if let Some(inner_r) = addr.as_var() {
if r == inner_r { if r == inner_r {
occurs_triggered = true; occurs_triggered = true;