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leave variable modules uninstantiated (#2685)

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This commit is contained in:
Mark Thom
2024-12-17 23:28:50 -08:00
parent 7e22c12a8d
commit 555dff5bad
4 changed files with 224 additions and 165 deletions
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5
src/machine/loader.rs
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@@ -1393,7 +1393,10 @@ impl MachineState {
Err(cons_term) => term_stack.push(cons_term),
}
}
(HeapCellValueTag::Var | HeapCellValueTag::AttrVar | HeapCellValueTag::StackVar, h) => {
(HeapCellValueTag::StackVar, h) => {
term_stack.push(Term::Var(Cell::default(), VarPtr::from(format!("s_{}", h))));
}
(HeapCellValueTag::Var | HeapCellValueTag::AttrVar, h) => {
term_stack.push(Term::Var(Cell::default(), VarPtr::from(format!("_{}", h))));
}
(HeapCellValueTag::Cons | HeapCellValueTag::CStr | HeapCellValueTag::Fixnum |