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32-bit system support, addressing all (at most) 4GB addresses of RAM.

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This commit is contained in:
Rujia Liu
2023-08-24 20:05:40 +08:00
parent 61f975ea18
commit 4fd059be5f
10 changed files with 156 additions and 75 deletions
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4
src/machine/copier.rs
View File

@@ -187,8 +187,8 @@ impl<T: CopierTarget> CopyTermState<T> {
fn copy_attr_var_list(&mut self, mut list_addr: HeapCellValue) {
while let HeapCellValueTag::Lis = list_addr.get_tag() {
let threshold = self.target.threshold();
let heap_loc = list_addr.get_value();
let str_loc = self.target[heap_loc].get_value();
let heap_loc = list_addr.get_value() as usize;
let str_loc = self.target[heap_loc].get_value() as usize;
self.target.push(heap_loc_as_cell!(threshold+2));
self.target.push(heap_loc_as_cell!(threshold+1));

42
src/machine/gc.rs
View File

@@ -68,7 +68,7 @@ pub(crate) struct StacklessPreOrderHeapIter<'a, UMP: UnmarkPolicy> {
orig_heap_len: usize,
start: usize,
current: usize,
next: usize,
next: u64,
_marker: PhantomData<UMP>,
}
@@ -153,14 +153,14 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
}
fn forward_var(&mut self) -> Option<HeapCellValue> {
if self.heap[self.next].get_forwarding_bit() {
if self.heap[self.next as usize].get_forwarding_bit() {
return self.backward_and_return();
}
let temp = self.heap[self.next].get_value();
let temp = self.heap[self.next as usize].get_value();
self.heap[self.next].set_value(self.current);
self.current = self.next;
self.heap[self.next as usize].set_value(self.current as u64);
self.current = self.next as usize;
self.next = temp;
None
@@ -175,23 +175,23 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
HeapCellValueTag::AttrVar => {
if let Some(cell) = UMP::forward_attr_var(self) { return Some(cell); }
if self.heap[self.next].get_mark_bit() {
if self.heap[self.next as usize].get_mark_bit() {
return Some(attr_var_as_cell!(self.current));
}
}
HeapCellValueTag::Var => {
if let Some(cell) = self.forward_var() { return Some(cell); }
if self.heap[self.next].get_mark_bit() {
if self.heap[self.next as usize].get_mark_bit() {
return Some(heap_loc_as_cell!(self.current));
}
}
HeapCellValueTag::Str => {
if self.heap[self.next + 1].get_forwarding_bit() {
if self.heap[self.next as usize + 1].get_forwarding_bit() {
return self.backward_and_return();
}
let h = self.next;
let h = self.next as usize;
let cell = self.heap[h];
let arity = cell_as_atom_cell!(self.heap[h]).get_arity();
@@ -203,13 +203,13 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
let last_cell_loc = h + arity;
self.next = self.heap[last_cell_loc].get_value();
self.heap[last_cell_loc].set_value(self.current);
self.heap[last_cell_loc].set_value(self.current as u64);
self.current = last_cell_loc;
return Some(cell);
}
HeapCellValueTag::Lis => {
let last_cell_loc = self.next + 1;
let last_cell_loc = self.next as usize + 1;
if self.heap[last_cell_loc].get_forwarding_bit() {
return self.backward_and_return();
@@ -218,13 +218,13 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
self.heap[last_cell_loc].set_forwarding_bit(true);
self.next = self.heap[last_cell_loc].get_value();
self.heap[last_cell_loc].set_value(self.current);
self.heap[last_cell_loc].set_value(self.current as u64);
self.current = last_cell_loc;
return Some(list_loc_as_cell!(last_cell_loc - 1));
}
HeapCellValueTag::PStrLoc => {
let h = self.next;
let h = self.next as usize;
let cell = self.heap[h];
if self.heap[h+1].get_forwarding_bit() {
@@ -236,13 +236,13 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
self.heap[last_cell_loc].set_forwarding_bit(true);
self.next = self.heap[last_cell_loc].get_value();
self.heap[last_cell_loc].set_value(self.current);
self.heap[last_cell_loc].set_value(self.current as u64);
self.current = last_cell_loc;
} else {
debug_assert!(self.heap[h].get_tag() == HeapCellValueTag::PStrOffset);
self.next = self.heap[h].get_value();
self.heap[h].set_value(self.current);
self.heap[h].set_value(self.current as u64);
self.current = h;
if self.heap[h].get_mark_bit() {
@@ -253,7 +253,7 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
return Some(cell);
}
HeapCellValueTag::PStrOffset => {
let h = self.next;
let h = self.next as usize;
let cell = self.heap[h];
// mark the Fixnum offset.
@@ -269,20 +269,20 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
self.heap[last_cell_loc].set_forwarding_bit(true);
self.next = self.heap[last_cell_loc].get_value();
self.heap[last_cell_loc].set_value(self.current);
self.heap[last_cell_loc].set_value(self.current as u64);
self.current = last_cell_loc;
} else {
debug_assert!(self.heap[h].get_tag() == HeapCellValueTag::CStr);
self.next = self.heap[h].get_value();
self.heap[h].set_value(self.current);
self.heap[h].set_value(self.current as u64);
self.current = h;
}
return Some(cell);
}
tag @ HeapCellValueTag::Atom => {
let cell = HeapCellValue::build_with(tag, self.next as u64);
let cell = HeapCellValue::build_with(tag, self.next);
let arity = AtomCell::from_bytes(cell.into_bytes()).get_arity();
if arity == 0 {
@@ -315,8 +315,8 @@ impl<'a, UMP: UnmarkPolicy> StacklessPreOrderHeapIter<'a, UMP> {
UMP::unmark(self.heap, self.current);
self.heap[self.current].set_value(self.next);
self.next = self.current;
self.current = temp;
self.next = self.current as u64;
self.current = temp as usize;
}
self.heap[self.current].set_forwarding_bit(false);

6
src/machine/machine_indices.rs
View File

@@ -143,6 +143,10 @@ impl IndexPtr {
#[derive(Debug, Clone, Copy, Ord, Hash, PartialOrd, Eq, PartialEq)]
pub struct CodeIndex(TypedArenaPtr<IndexPtr>);
#[cfg(target_pointer_width="32")]
const_assert!(std::mem::align_of::<CodeIndex>() == 4);
#[cfg(target_pointer_width="64")]
const_assert!(std::mem::align_of::<CodeIndex>() == 8);
impl Deref for CodeIndex {
@@ -164,7 +168,7 @@ impl DerefMut for CodeIndex {
impl From<CodeIndex> for UntypedArenaPtr {
#[inline(always)]
fn from(ptr: CodeIndex) -> UntypedArenaPtr {
unsafe { std::mem::transmute(ptr.0.as_ptr()) }
UntypedArenaPtr::build_with(ptr.0.as_ptr() as usize)
}
}

4
src/machine/mod.rs
View File

@@ -1247,7 +1247,7 @@ impl Machine {
}
}
TrailEntryTag::TrailedBlackboardEntry => {
let key = Atom::from(h);
let key = Atom::from(h as u64);
match self.indices.global_variables.get_mut(&key) {
Some((_, ref mut loc)) => *loc = None,
@@ -1255,7 +1255,7 @@ impl Machine {
}
}
TrailEntryTag::TrailedBlackboardOffset => {
let key = Atom::from(h);
let key = Atom::from(h as u64);
let value_cell = HeapCellValue::from(u64::from(self.machine_st.trail[i + 1]));
match self.indices.global_variables.get_mut(&key) {

2
src/machine/streams.rs
View File

@@ -372,7 +372,7 @@ impl StreamOptions {
#[inline]
pub fn get_alias(self) -> Option<Atom> {
if self.has_alias() {
Some(Atom::from((self.alias() << 3) as usize))
Some(Atom::from((self.alias() as u64) << 3))
} else {
None
}

24
src/machine/system_calls.rs
View File

@@ -988,7 +988,7 @@ impl MachineState {
pub(crate) fn call_continuation_chunk(&mut self, chunk: HeapCellValue, return_p: usize) -> usize {
let chunk = self.store(self.deref(chunk));
let s = chunk.get_value();
let s = chunk.get_value() as usize;
let arity = cell_as_atom_cell!(self.heap[s]).get_arity();
let num_cells = arity - 1;
@@ -1169,7 +1169,7 @@ impl Machine {
let attr_var = self.deref_register(1);
if let HeapCellValueTag::AttrVar = attr_var.get_tag() {
let attr_var_loc = attr_var.get_value();
let attr_var_loc = attr_var.get_value() as usize;
self.machine_st.heap[attr_var_loc] = heap_loc_as_cell!(attr_var_loc);
self.machine_st.trail(TrailRef::Ref(Ref::attr_var(attr_var_loc)));
}
@@ -1355,7 +1355,7 @@ impl Machine {
} else {
if is_internal_call {
debug_assert_eq!(goal.get_tag(), HeapCellValueTag::Str);
goal = self.machine_st.heap[goal.get_value()+1];
goal = self.machine_st.heap[goal.get_value() as usize+1];
(module_name, goal) = self.machine_st.strip_module(goal, module_name);
if let Some((inner_name, inner_arity)) = self.machine_st.name_and_arity_from_heap(goal) {
@@ -1585,7 +1585,7 @@ impl Machine {
);
if HeapCellValueTag::Str == qualified_goal.get_tag() {
let s = qualified_goal.get_value();
let s = qualified_goal.get_value() as usize;
let (name, arity) = cell_as_atom_cell!(self.machine_st.heap[s])
.get_name_and_arity();
@@ -4896,7 +4896,7 @@ impl Machine {
Some(AttrListMatch { match_site: MatchSite::Match(match_site), .. }) => {
let list_head = self.machine_st.heap[match_site];
if list_head.get_value() == match_site {
if list_head.get_value() as usize == match_site {
// at the end of the list, no match found in this case.
self.machine_st.fail = true;
} else {
@@ -4969,7 +4969,7 @@ impl Machine {
prev_tail
} else {
if self.machine_st.heap[match_site + 1].is_var() {
let h = attr_var.get_value();
let h = attr_var.get_value() as usize;
self.machine_st.heap[h] = heap_loc_as_cell!(h);
self.machine_st.trail(TrailRef::Ref(Ref::attr_var(h)));
@@ -5044,13 +5044,13 @@ impl Machine {
}
MatchSite::Match(match_site) => {
let l = self.machine_st.heap[match_site].get_value();
self.machine_st.heap[match_site].set_value(h);
self.machine_st.heap[match_site].set_value(h as u64);
(match_site, l)
}
};
self.machine_st.trail(TrailRef::AttrVarListLink(match_site, l));
self.machine_st.trail(TrailRef::AttrVarListLink(match_site, l as usize));
}
None => {
// the list is empty.
@@ -5080,7 +5080,7 @@ impl Machine {
let mut prev_tail = None;
while let HeapCellValueTag::Lis = attrs_list.get_tag() {
let mut list_head = self.machine_st.heap[attrs_list.get_value()];
let mut list_head = self.machine_st.heap[attrs_list.get_value() as usize];
loop {
read_heap_cell!(list_head,
@@ -5100,7 +5100,7 @@ impl Machine {
if module == module_loc && name == t_name && arity == t_arity {
return Some(AttrListMatch {
match_site: MatchSite::Match(attrs_list.get_value()),
match_site: MatchSite::Match(attrs_list.get_value() as usize),
prev_tail,
});
}
@@ -5113,7 +5113,7 @@ impl Machine {
);
}
let tail_loc = attrs_list.get_value() + 1;
let tail_loc = attrs_list.get_value() as usize + 1;
prev_tail = Some(tail_loc);
// do the work of self.store(self.deref(...)) but inline it
@@ -5458,7 +5458,7 @@ impl Machine {
let value = self.deref_register(2);
debug_assert_eq!(HeapCellValueTag::AttrVar, var.get_tag());
self.machine_st.heap[var.get_value()] = value;
self.machine_st.heap[var.get_value() as usize] = value;
}
#[inline(always)]