rishi/scryer-prolog
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refactor to actual modules

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This commit is contained in:
Mark Thom
2019-03-03 23:29:02 -07:00
parent f458d12676
commit 3d8c0a43a6
33 changed files with 1887 additions and 1793 deletions
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17
src/prolog/machine/machine_state.rs
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@@ -1,14 +1,17 @@
use prolog_parser::ast::*;
use prolog_parser::string_list::*;
use prolog::instructions::*;
use prolog::and_stack::*;
use prolog::copier::*;
use prolog::heap::*;
use prolog::machine::{AttrVarInitializer, IndexStore};
use prolog::clause_types::*;
use prolog::forms::*;
use prolog::machine::and_stack::*;
use prolog::machine::attributed_variables::*;
use prolog::machine::copier::*;
use prolog::machine::heap::*;
use prolog::machine::machine_errors::*;
use prolog::machine::machine_indices::*;
use prolog::machine::modules::*;
use prolog::machine::or_stack::*;
use prolog::num::{BigInt, BigUint, Zero, One};
use prolog::or_stack::*;
use downcast::Any;
@@ -188,6 +191,8 @@ impl IndexMut<RegType> for MachineState {
}
}
pub type Registers = Vec<Addr>;
#[derive(Clone, Copy)]
pub(super) enum MachineMode {
Read,