rishi/scryer-prolog
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Remove debug println!s

Browse Source
This commit is contained in:
Nicolas Luck
2023-07-12 01:26:54 +02:00
parent 568abef5b8
commit 3347f830c7
1 changed files with 0 additions and 3 deletions
Download Patch File Download Diff File Expand all files Collapse all files

3
src/machine/mod.rs
View File

@@ -360,7 +360,6 @@ impl Machine {
pub fn parse_output(&self) -> QueryResult { pub fn parse_output(&self) -> QueryResult {
let output = self.get_user_output(); let output = self.get_user_output();
println!("parse_output output: {:?}", output);
let parsed_lines = output.split(";") let parsed_lines = output.split(";")
.map(|s| s.trim()) .map(|s| s.trim())
.map(|s| s.replace(".", "")) .map(|s| s.replace(".", ""))
@@ -387,8 +386,6 @@ impl Machine {
}) })
.collect::<Vec<QueryResultLine>>(); .collect::<Vec<QueryResultLine>>();
println!("parsed_lines: {:?}", parsed_lines);
// If there is only one line, and it is true or false, return that. // If there is only one line, and it is true or false, return that.
if parsed_lines.len() == 1 { if parsed_lines.len() == 1 {
match parsed_lines[0].clone() { match parsed_lines[0].clone() {