rishi/scryer-prolog
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

consider Str, PStrLoc in ElideLists of StackfulHeapIterator (#2075)

Browse Source
This commit is contained in:
Mark
2023-10-04 00:26:44 -06:00
parent 005570c90a
commit 1e60eeef34
1 changed files with 5 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
src/heap_iter.rs
View File

@@ -236,17 +236,17 @@ impl<'a, ElideLists: ListElisionPolicy> StackfulPreOrderHeapIter<'a, ElideLists>
let cell = self.read_cell(loc);
read_heap_cell!(cell,
(HeapCellValueTag::Lis, vh) => {
(HeapCellValueTag::Lis |
HeapCellValueTag::Str |
HeapCellValueTag::PStrLoc, vh) => {
let forward = if ElideLists::elide_lists() { true } else { cell.get_mark_bit() };
if forward && self.heap[vh].get_mark_bit() {
self.read_cell_mut(loc).set_forwarding_bit(true);
}
}
(HeapCellValueTag::Str |
HeapCellValueTag::AttrVar |
HeapCellValueTag::Var |
HeapCellValueTag::PStrLoc, vh) => {
(HeapCellValueTag::AttrVar |
HeapCellValueTag::Var, vh) => {
if self.heap[vh].get_mark_bit() {
self.read_cell_mut(loc).set_forwarding_bit(true);
}